Novel way to program accelerators
ROCCC 2.0 is a C to HDL compilation tool focused on FPGA-based code acceleration. Its objectives are to maximize parallelism within the constraints of the target device, optimize clock cycle time by efficient pipelining, and minimize the area utilized. It also uses extensive and unique loop analysis techniques to increase the reuse of data fetched from off-chip memory to reduce memory latency.
ROCCC 2.0 is the evolution of the original ROCCC project which started at the University of California Riverside.
Partners of Jacquard Computing
Convey Computer
Convey Computer provides a high performance and cost effective solution for addressing the needs of high performance computing applications. Their systems provide an easy to use environment for software developers in HPC applications.
Convey Computer offers hybrid-core systems that combine traditional processors and multiple FPGAs into a single cache coherent platform. Their latest offerings include the HC-1 and the HC-1ex which use Xilinx Virtex-5 and Virtex-6 FPGAs allowing for larger applications and significant performance gains.
Pico Computing
Pico Computing specializes in highly integrated development and deployment platforms based on FPGA technologies. They are hardware and embedded software design experts with domain knowledge in applications that include cryptography, networking, signal processing, bioinformatics, and scientific computing.
They offer standard products that range from the tiny E-12 FPGA card, to large scale FPGA clusters having as many as 160 FPGAs in a single 4U rack-mounted enclosure. Their products are used in embedded systems as well as in military, national security and high performance computing applications.
read more