Change List
Revision 0.6 Added Features
High Level Optimizations – Input and output ports to modules may be specified as individual parameters instead of passed in a struct.
High Level Optimizations – Input and output streams, scalars, and feedback scalars can be specified as individual parameters to system code as opposed to local variable declarations.
High Level Optimizations – N-dimensional streams are now supported, previously we only supported up to 2-dimensional streams.
High Level Optimizations – Dead code elimination restructured and implemented for module and system code.
High Level Optimizations – Inlining of individual or all module instantiations supported.
High Level Optimizations – Reduction code performing a summation is now identified and custom hardware is created with much greater potential throughput.
Hardware Generation – Input and output streams interface with the outside world through FIFOs implemented using cross-clock BRAMs.
Hardware Generation – User controlled addition of registers along paths that have high fanout has been added.
Hardware Generation – Users may specify a maximum allowable fanout for every generated hardware signal, after which a fanout tree will be generated and pipelined.
GUI – More intuitive interface to controlling pipelining added to better allow the user to control pipeline depth.
GUI – Optimizations now have default values that can be user controlled.
GUI – Added a registration page on start up to receive news on ROCCC 2.0
GUI – When compiling, syntax errors are detected immediately and the optimizations page does not open
Revision 0.6 Bug Fixes
High Level Optimizations – Ports declared in new style modules now correctly keep their order in module instantiations.
High Level Optimizations – Feedback variables that were also results of predication statements are now correctly identified as feedback variables.
Hardware Generation – Names of variables that were intermittently lost on compilation are now maintained.
GUI – Extraneous files in the project subdirectories are now ignored and do not affect compilation.
GUI – Generating a testbench for systems that have no streams no longer asks for multiple test sets for input and output scalars.
Revision 0.5.2 Added Features
High Level Optimizations – Modules may be specified as redundant.
High Level Optimizations – Data that flows from redundant modules to redundant modules will make the intermediate voters redundant.
Hardware Generation – The user can now specify when registers should be inserted into high-fanout operations.
Hardware Generation – Pure feedback calls are no longer output scalars
Hardware Generation – Redundancy vote intrinsics supported in the low end.
Hardware Generation – The outer loop induction variable can now be used as the only index into a single dimensional array.
GUI – Added support for redundancy in the compile flags.
GUI – Added a BRAM to BRAM interface generation for systems.
GUI – PCores not support multidimensional output streams.
GUI – Added a new ROCCC perspective that starts on new installs.
GUI – Added a ROCCC welcome page for installs and updates.
GUI – Added an “Add Intrinsic” button in the intrinsic list viewer.
GUI – Menu enhancements.
GUI – Added a table for output stream info that allows control of the number of output channels.
GUI – Now can import the ROCCC examples through a single button or automatically done when setting the distribution for the first time.
GUI – IPCores view now highlights out of date modules.
GUI – Better error checking and handling.
GUI – IPCores table now displays ports much more quickly.
GUI – Dependent files window now supports adding a netlist, hdl, and wrapper for each necessary component.
GUI – PCores have better user side support when dealing with floating point values.
GUI – Users can now create a new project through the ROCCC menu with one button
GUI – Lock messages are more informative.
GUI – Adding a test case on testbenches for input or output scalars will copy the previous set rather than having all blank spots for the test values.
GUI – IPCores view will restart itself after a compile or cancel if it is showing the GUI locked message.
GUI – IPCores view will no longer clear the ports table after compile. Any changes in the shown ports after compile will automatically be updated.
GUI – Testbenches now output a message when they are done computing data.
High Level Optimizations – Data that flows from redundant modules to redundant modules will make the intermediate voters redundant.
Hardware Generation – The user can now specify when registers should be inserted into high-fanout operations.
Hardware Generation – Pure feedback calls are no longer output scalars
Hardware Generation – Redundancy vote intrinsics supported in the low end.
Hardware Generation – The outer loop induction variable can now be used as the only index into a single dimensional array.
GUI – Added support for redundancy in the compile flags.
GUI – Added a BRAM to BRAM interface generation for systems.
GUI – PCores not support multidimensional output streams.
GUI – Added a new ROCCC perspective that starts on new installs.
GUI – Added a ROCCC welcome page for installs and updates.
GUI – Added an “Add Intrinsic” button in the intrinsic list viewer.
GUI – Menu enhancements.
GUI – Added a table for output stream info that allows control of the number of output channels.
GUI – Now can import the ROCCC examples through a single button or automatically done when setting the distribution for the first time.
GUI – IPCores view now highlights out of date modules.
GUI – Better error checking and handling.
GUI – IPCores table now displays ports much more quickly.
GUI – Dependent files window now supports adding a netlist, hdl, and wrapper for each necessary component.
GUI – PCores have better user side support when dealing with floating point values.
GUI – Users can now create a new project through the ROCCC menu with one button
GUI – Lock messages are more informative.
GUI – Adding a test case on testbenches for input or output scalars will copy the previous set rather than having all blank spots for the test values.
GUI – IPCores view will restart itself after a compile or cancel if it is showing the GUI locked message.
GUI – IPCores view will no longer clear the ports table after compile. Any changes in the shown ports after compile will automatically be updated.
GUI – Testbenches now output a message when they are done computing data.
Revision 0.5.2 Bug Fixes
High Level Optimizations – Fixed multiplication by constant elimination to only work with integers and not floating point values.
High Level Optimizations – Updated if conversion to process until no change occurs.
High Level Optimizations – Updated constant propagation to change additions of negative values into subtracts and subtracts of negative numbers into additions.
High Level Optimizations – Fixed a bug where some constant propagation identities were identified on the left side of a binary expression but not the right.
High Level Optimizations – Fixed constant array propagation to work with floating point values.
High Level Optimizations – Fixed a bug in constant propagation where the unary expression of convert wasn’t handled correctly.
High Level Optimizations – Fixed issue with fully unrolling loops.
Hardware Generation – Fixed several issues that caused generated VHDL to not be accepted by XST, including assert statements in the output controller and a counter variable changed from an asynchronous statement to a process.
Hardware Generation – Fixed issue where feedback could be above the height of the datapath, and where feedback VHDL could be generated multiple time, resulting in compile failure.
Hardware Generation – Fixed issue that caused casts from one type to another resulted in a segmentation fault.
Hardware Generation – Fixed issue where using input scalars as the for loop end values on a long pipeline could result in very poor generated frequency.
Hardware Generation – Pipelining pass changed to finish as soon as there is no change, which dramatically speeds up compilation time on large examples.
Hardware Generation – Fixed issue where 1-bit signals that were sign-extended were incorrectly output.
Hardware Generation – Fixed issue when using testbench with non-32-bit output streams.
GUI – Fixed error when preferences were locked when opened from ‘Incorrect Distribution Folder’ message.
GUI – Fixed other action problems that occurred when dealing with components that started with lower case c.
GUI – Fixed bug in PCore generation when using an .ngc file caused an “incorrect file name” error.
GUI – Updates are now only allowed if the user has write permissions in the distribution.
GUI – No longer creating components whose names are C reserved words or ROCCC reserved words.
GUI – Adding intrinsics that cast from different datatypes now have correct port names.
GUI – Fixed errors when calling ROCCC functions with no file opened in the editor.
GUI – Dependent files window corectly adds the necessary data to the PCore files when using netlists.
GUI – Compilation will not be done if the user does not have write permissions in the folder where the file is being compiled.
GUI – Any running ROCCC builds are now canceled when Eclipse is closed.
GUI – PCore generation will no longer accept dependent files with spaces in their name.
GUI – Fixed testbench error when dealing with 1 bit streams.
GUI – No longer allow generation PCores or testbenches on components compiled with a previous version of the GUI. This applies to the newly added BRAM interface generation as well.
High Level Optimizations – Updated if conversion to process until no change occurs.
High Level Optimizations – Updated constant propagation to change additions of negative values into subtracts and subtracts of negative numbers into additions.
High Level Optimizations – Fixed a bug where some constant propagation identities were identified on the left side of a binary expression but not the right.
High Level Optimizations – Fixed constant array propagation to work with floating point values.
High Level Optimizations – Fixed a bug in constant propagation where the unary expression of convert wasn’t handled correctly.
High Level Optimizations – Fixed issue with fully unrolling loops.
Hardware Generation – Fixed several issues that caused generated VHDL to not be accepted by XST, including assert statements in the output controller and a counter variable changed from an asynchronous statement to a process.
Hardware Generation – Fixed issue where feedback could be above the height of the datapath, and where feedback VHDL could be generated multiple time, resulting in compile failure.
Hardware Generation – Fixed issue that caused casts from one type to another resulted in a segmentation fault.
Hardware Generation – Fixed issue where using input scalars as the for loop end values on a long pipeline could result in very poor generated frequency.
Hardware Generation – Pipelining pass changed to finish as soon as there is no change, which dramatically speeds up compilation time on large examples.
Hardware Generation – Fixed issue where 1-bit signals that were sign-extended were incorrectly output.
Hardware Generation – Fixed issue when using testbench with non-32-bit output streams.
GUI – Fixed error when preferences were locked when opened from ‘Incorrect Distribution Folder’ message.
GUI – Fixed other action problems that occurred when dealing with components that started with lower case c.
GUI – Fixed bug in PCore generation when using an .ngc file caused an “incorrect file name” error.
GUI – Updates are now only allowed if the user has write permissions in the distribution.
GUI – No longer creating components whose names are C reserved words or ROCCC reserved words.
GUI – Adding intrinsics that cast from different datatypes now have correct port names.
GUI – Fixed errors when calling ROCCC functions with no file opened in the editor.
GUI – Dependent files window corectly adds the necessary data to the PCore files when using netlists.
GUI – Compilation will not be done if the user does not have write permissions in the folder where the file is being compiled.
GUI – Any running ROCCC builds are now canceled when Eclipse is closed.
GUI – PCore generation will no longer accept dependent files with spaces in their name.
GUI – Fixed testbench error when dealing with 1 bit streams.
GUI – No longer allow generation PCores or testbenches on components compiled with a previous version of the GUI. This applies to the newly added BRAM interface generation as well.
Revision 0.5.1 Added Features
GUI – Data types are displayed in the IPCores view
GUI – All loop based flags are removed from the compiler flags for modules.
GUI – All loops in modules are automatically fully unrolled, no flags needed.
GUI – Testbenching and PCore generation now handles the stall signal
GUI – Testbenching for systems now supports user specified input and output data for streams.
GUI – Testbench values now conform to the datatype of the port, not the way the value was written
C Level – Verification pass catches more unsupported code.
C Level – Updated constant propagation to calculate comparisons between two constants at compile time
C Level – Improved the if conversion pass to support more complex control with arbitrary if statements
Added a pass to handle the upcasting and downcasting of both floats and integers so they can be mixed in expressions
Hardware Level – Systolic Arrays may now be retimed
Hardware Level – Added support for systems that have any mixture of input streams, input scalars, output streams, and output scalars
Hardware Level – Added stall signal to all generated code
Hardware Level – We now differentiate between output streams and output scalars
Hardware Level – Added support for signed comparisons in VHDL generation, which required package support
GUI – All loop based flags are removed from the compiler flags for modules.
GUI – All loops in modules are automatically fully unrolled, no flags needed.
GUI – Testbenching and PCore generation now handles the stall signal
GUI – Testbenching for systems now supports user specified input and output data for streams.
GUI – Testbench values now conform to the datatype of the port, not the way the value was written
C Level – Verification pass catches more unsupported code.
C Level – Updated constant propagation to calculate comparisons between two constants at compile time
C Level – Improved the if conversion pass to support more complex control with arbitrary if statements
Added a pass to handle the upcasting and downcasting of both floats and integers so they can be mixed in expressions
Hardware Level – Systolic Arrays may now be retimed
Hardware Level – Added support for systems that have any mixture of input streams, input scalars, output streams, and output scalars
Hardware Level – Added stall signal to all generated code
Hardware Level – We now differentiate between output streams and output scalars
Hardware Level – Added support for signed comparisons in VHDL generation, which required package support
Revision 0.5.1 Bug Fixes
GUI – Fixed a bug when compiling a component that starts with a lower case ‘c’
GUI – Fixed a bug where adding intrinsics with the same name and multiple bitsizes incorrectly overwrote the previous intrinsic
GUI – Floating point values are now converted to the correct binary format when generating a testbench
C Level – Fixed an off by one error that caused loop unrolling to unroll the incorrect amount
C Level – Fixed an error that caused the insertion of copies in the hardware to not be performed, resulting in incorrect hardware in some cases
Hardware Level – Issues with extra copies being made in systolic arrays which caused output data to sometimes be wrong has been fixed
Hardware Level – Made 64 bit floating point constants work correctly.
Hardware Level – Fixed issue where doing a cast from float to int caused an assert to be thrown
Hardware Level – Fixed issue where floatin point greater than or equal operator incorrectly instantiated greater than core
Fixed issue where input streams might be read before inputReady signal went high
GUI – Fixed a bug where adding intrinsics with the same name and multiple bitsizes incorrectly overwrote the previous intrinsic
GUI – Floating point values are now converted to the correct binary format when generating a testbench
C Level – Fixed an off by one error that caused loop unrolling to unroll the incorrect amount
C Level – Fixed an error that caused the insertion of copies in the hardware to not be performed, resulting in incorrect hardware in some cases
Hardware Level – Issues with extra copies being made in systolic arrays which caused output data to sometimes be wrong has been fixed
Hardware Level – Made 64 bit floating point constants work correctly.
Hardware Level – Fixed issue where doing a cast from float to int caused an assert to be thrown
Hardware Level – Fixed issue where floatin point greater than or equal operator incorrectly instantiated greater than core
Fixed issue where input streams might be read before inputReady signal went high
Revision 0.5 Added Features
GUI – Support for handling multiple intrinsics added
GUI – Generation of Testbenched is supported for modules and systems
GUI – Generation of PCores for integration with Xilinx EDK for certain modules and systems has been added
GUI – Infrastructure for automatic updating has been added
C Level – Support for floating point comparisons and conversion added
C Level – Floating point constants declared as “const float” are propagated correctly
C Level – Infinite for loops are now supported and generate systems that can continuously run
Optimization – Copy propagation is performed correctly
Optimization – An optimization for fully unrolling all loops has been added
Optimization – Tree balancing on the generated hardware is now selectable
Optimization – Copy retiming on the generated hardware is now selectable
GUI – Generation of Testbenched is supported for modules and systems
GUI – Generation of PCores for integration with Xilinx EDK for certain modules and systems has been added
GUI – Infrastructure for automatic updating has been added
C Level – Support for floating point comparisons and conversion added
C Level – Floating point constants declared as “const float” are propagated correctly
C Level – Infinite for loops are now supported and generate systems that can continuously run
Optimization – Copy propagation is performed correctly
Optimization – An optimization for fully unrolling all loops has been added
Optimization – Tree balancing on the generated hardware is now selectable
Optimization – Copy retiming on the generated hardware is now selectable
Revision 0.5 Bug Fixes
C Level – The float constant -0.0 is now correctly identified and supported
Optimization – Copy propagation is appropriately called when compiling
Optimization – Loop fusion works correctly with variable bounded loops
Optimization – Fully unrolling a loop previously would not unroll loops with more than 100000 iterations
Optimization – The algorithm that determines feedback variables has been improved to a more efficient algorithm
Optimization – Copy propagation is appropriately called when compiling
Optimization – Loop fusion works correctly with variable bounded loops
Optimization – Fully unrolling a loop previously would not unroll loops with more than 100000 iterations
Optimization – The algorithm that determines feedback variables has been improved to a more efficient algorithm