Area vs Frequency
Once you have coded a module or system and are ready to compile it to VHDL, you will be presented with a list of optimizations to choose from upon calling “Build.” The Frequency vs Area Tuning page in this wizard allows you to set weights for various operations used in the pipline retiming.
To view the pipeline retiming page, click “Build” under the ROCCC menu or toolbar with a ROCCC module or system open in the editor. A compilation wizard will pop up with various pages to cycle through by pressing “Next” at the bottom. The third page is the pipeline retiming page. From here you will be able to set the values to retime your hardware to your desired platform.
Controlling Pipelining vs Compaction
The top portion of this page has a slider that allows you to control the amount of compaction the compiler will try to perform on the component being compiled. The further left the slider is, the more pipelined the compiler will try to make the component. The further right the slider is, the more compact the compiler will try to make the component. When you slide this slider left or right, the average number of operations the compiler will try to put in each operation changes. This will give you a quick and easy way to help you tune your components area and frequency.
However, not all operations take the same amount of time to execute. To naively have the compiler arbitrarily pack operations together without considering how expensive an operation is would give inconsistent results across different components. Because of this, ROCCC allows you to specify weight values for each basic operation. A larger weight means that operation is more expensive in terms of execution time on the desired platform. To edit these values, click the advanced tab at the top of the Area vs Frequency page.
These weight values have no real absolute meaning, they only have meaning relative to each other. For example, if our Mult operation takes twice as long as our Add, we need to make sure we make the weight value for Mult is twice that of Add. This can be done as (100 and 50) or (50 and 25), it doesn’t really matter as long as the weights are proportional to each other. In this case when compaction occurs, the compiler would attempt to allow two chained additions to happen together for every multiplication that is done.
If all the weights have the same value, that means that they all take the same amount of execution time. Again, this can be achieved by having the weights as all 1′s or even all 500′s, as long as they are all the same value. The default weights that were distributed with ROCCC are the values we came up with for targeting 150 MHZ on a LX-330. These weights combined with the pipeline slider gives you precise control over how to tune your component in terms of area and frequency.
Also on this page, you can also specify the maximum number of fanout per value before logic is forced to be registered. The reason this is necessary is because having very large fanouts can slow down your end circuit which is not desirable. Having large fanouts become registered can help alleviate that issue at the cost of increased area usage for the registers. This extra area usage can be reduced by using the FanoutTreeGeneration on the low-level optimizations page.
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